US 2026/0251691 A1Published application

Dynamic on-resistance measurement circuit

AssigneesMaterials Analysis Technology Inc., National Yang Ming Chiao Tung University

InventorsRustam Kumar, Tian-Li WU, HUNG-JEN CHEN

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Abstract

In a dynamic on-resistance measurement circuit, a control circuit is configured to, in an initial de-stressing process, sequentially turn on only a second switch to release a residual stress voltage of a tested transistor through the second switch while an energy storage circuit stores a common voltage; in a stress voltage applying process, turn off the second switch, and turn on a third switch and a first switch to apply a stress voltage to the tested transistor; and in a measurement procedure, turn off the first switch and the third switch, and turn on the tested transistor and the second switch such that a constant current flows through the second switch and an inductor to the tested transistor, and measure a voltage and a current of the tested transistor and accordingly calculate dynamic on-resistance of the tested transistor.

Claims19

Dependent claims

A dynamic on-resistance measurement circuit, which is used for measuring a tested transistor, and comprising:

an energy storage circuit connected to a common power source and connected between a first discharge node and a second discharge node;
a plurality of switch components including a first switch, a second switch and a third switch, wherein a first terminal of the first switch is connected to the first discharge node, a first terminal of the third switch is connected to the second discharge node, a second terminal of the first switch is connected to a first terminal of the second switch and a first terminal of an inductor, a first terminal of the tested transistor is connected to a second terminal of the third switch and to a second terminal of the inductor, and a second terminal of the second switch and a second terminal of the tested transistor are connected to a reference potential terminal;
and
a control circuit connected to a control terminal of each of the plurality of switch components, and configured to perform a single measurement operation including, sequentially:
in an initial de-stressing procedure, turning on only the second switch, such that a residual stress voltage of the tested transistor is released through the second switch;
in a stress voltage applying procedure, turning off the second switch and turning on the third switch and the first switch, such that a stress voltage is applied across the first terminal and the second terminal of the tested transistor;
and
in a measurement procedure, turning off the first switch and the third switch and turning on the tested transistor and the second switch, measuring a voltage and a current between the first terminal and the second terminal of the tested transistor, and calculating a dynamic on-resistance of the tested transistor according to the voltage and the current.

5 more elements

A dynamic on-resistance measurement circuit, which is used for measuring a tested transistor, and comprising:

an energy storage circuit connected to a common power source and connected between a first discharge node and a second discharge node;
a plurality of switch components including a first switch, a second switch, and a third switch, wherein a first terminal of the first switch is connected to the first discharge node, a first terminal of the third switch is connected to the second discharge node, a second terminal of the first switch is connected to a first terminal of the second switch and a first terminal of an inductor, a first terminal of the tested transistor is connected to a second terminal of the third switch and a second terminal of the inductor, and a second terminal of the second switch and a second terminal of the tested transistor are connected to a reference potential terminal;
and
a control circuit connected to the control terminal of each of the plurality of switch components, and configured to perform a continuous measurement operation multiple times, wherein the continuous measurement operation includes, sequentially:
in a stress voltage applying procedure, turning on the third switch and the first switch to apply a stress voltage across the first terminal and the second terminal of the tested transistor;
in a measurement procedure, turning off the third switch and the first switch and turning on the tested transistor and the second switch, measuring a voltage and a current between the first terminal and the second terminal of the tested transistor, and calculating a dynamic on-resistance of the tested transistor according to the voltage and the current;
and
in a releasing procedure, continually turning on the second switch, turning on the third switch and turning off the tested transistor, such that the current flows through the third switch, the inductor, and the tested transistor to the reference potential terminal for releasing.

5 more elements

Dependencies are inferred from the claim text.