Patterning Method Applicable in Semiconductor Processing
AssigneeImec Vzw
InventorsAndreas Frommhold, Vincent Wiaux, Victor M. Blanco
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AssigneeImec Vzw
InventorsAndreas Frommhold, Vincent Wiaux, Victor M. Blanco
Estimating the term…
A pattern is produced in a die area of a layer formed on a support substrate by at least two process sequences, each comprising a lithography step and an etch step, performed in adjacent sub-portions of the die area. One or more parallel line shaped features of the pattern extend from the first sub-portion of the die area to the second sub-portion. Mutually aligned and spaced apart first and second parts of the line features are printed in the respective process sequence steps and transferred to the layer in the form of negative or positive pattern features in the patterned layer. In either case, directional etching is thereafter applied to stretch the aligned trenches and thereby obtain the desired line features extending from one sub-portion of the die area to the other sub-portion.
A patterning method applicable in a semiconductor production process, the method comprising the steps of :
A method for patterning in a semiconductor production process, the method comprising:
A method comprising:
Dependencies are inferred from the claim text.