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US 2026/0238224 A1Published application
Integrator and sigma-delta analog-to-digital converter
AssigneeRealtek Semiconductor Corp.
InventorChih-Chiang Wang
Life of this patent
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Abstract
The present invention provides an integrator used in a sigma-delta analog-to-digital converter, which includes a sampling circuit and an integrating circuit. By designing a specific switch with a charge averaging function in the sampling circuit, the voltage level of terminals of the multiple sampling capacitors can be averaged to be close to a voltage level of the input signal to be sampled before a sampling stage, so that the input buffer only requires lower drive capability to charge or discharge the sampling capacitor. Thus the power consumption of the input buffer can be reduced.
Claims10
An integrator, comprising:
- a sampling circuit, configured to perform a sampling operation on a first signal to generate a sampled signal, and the sampling circuit comprising:
- a first circuit comprising a first switch, a second switch, a third switch, a fourth switch, and a first sampling capacitor, wherein the first switch is coupled between a first terminal of the first circuit and a common-mode voltage, the second switch is coupled between the first terminal and a sampling circuit output terminal, the third switch is coupled between a sampling circuit input terminal and a second terminal of the first circuit, the fourth switch is coupled between the second terminal and a first voltage, and the first sampling capacitor is coupled between the first terminal and the second terminal;
- a second circuit comprising a first switch, a second switch, a third switch, a fourth switch, and a second sampling capacitor, wherein the first switch is coupled between a first terminal of the second circuit and the common-mode voltage, the second switch is coupled between the first terminal and the sampling circuit output terminal, the third switch is coupled between the sampling circuit input terminal and a second terminal of the second circuit, the fourth switch is coupled between the second terminal and a second voltage, and the second sampling capacitor is coupled between the first terminal and the second terminal;
- and
- a first specific switch, coupled between the second terminal of the first circuit and the second terminal of the second circuit;
- and
- an integration circuit, coupled to the sampling circuit, configured to perform an integration operation on the sampled signal to generate a second signal.
4 more elements
A sigma-delta analog-to-digital converter, comprising:
- an input buffer, configured to receive an input signal to generate a buffered input signal;
- an adder, configured to subtract a feedback signal from the buffered input signal to generate a first signal;
- an integrator, configured to perform sampling and integration operations on the first signal to generate a second signal;
- a quantization circuit, configured to generate an output signal according to the second signal;
- and
- a digital-to-analog converter, configured to perform a digital-to-analog conversion operation on the output signal to generate the feedback signal;
- wherein the integrator comprises:
- a sampling circuit, configured to perform a sampling operation on a first signal to generate a sampled signal, and the sampling circuit comprising:
- a first circuit comprising a first switch, a second switch, a third switch a fourth switch, and a first sampling capacitor, wherein the first switch is coupled between a first terminal of the first circuit and a common-mode voltage, the second switch is coupled between the first terminal and a sampling circuit output terminal, the third switch is coupled between a sampling circuit input terminal and a second terminal of the first circuit, the fourth switch is coupled between the second terminal and a first voltage, and the first sampling capacitor is coupled between the first terminal and the second terminal;
- a second circuit comprising a first switch, a second switch, a third switch, a fourth switch, and a second sampling capacitor, wherein the first switch is coupled between a first terminal of the second circuit and the common-mode voltage, the second switch is coupled between the first terminal and the sampling circuit output terminal, the third switch is coupled between the sampling circuit input terminal and a second terminal of the second circuit, the fourth switch is coupled between the second terminal and a second voltage, and the second sampling capacitor is coupled between the first terminal and the second terminal;
- and
- a first specific switch, coupled between the second terminal of the first circuit and the second terminal of the second circuit;
- and
- an integration circuit, coupled to the sampling circuit, configured to perform an integration operation on the sampled signal to generate a second signal.
11 more elements
Dependencies are inferred from the claim text.