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US 2026/0231497 A1Published application
Peald in-situ doped sion for gaa structure device performance and yield
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsCheng-I LIN, Cheng-Yu WEI, Shu-Han CHEN, Chi On CHUI
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Abstract
A fin structure is formed over a substrate. An insulation feature is formed over the substrate and laterally with respect to the fin structure. A dielectric layer of SiON is formed over the insulation feature and over the fin structure. A dummy gate structure is formed over the insulation feature, and the dielectric layer separates the dummy gate structure from the insulation feature.
Claims20
A method of manufacturing a semiconductor device, comprising:
- forming a fin structure over a substrate, the fin structure including first semiconductor layers and second semiconductor layers alternately stacked;
- forming a dielectric layer over the fin structure, the dielectric layer including a dielectric material having etch selectivity over silicon oxide;
- forming a first sacrificial gate structure over the fin structure;
- forming a first gate spacer adjacent to the first sacrificial gate structure, the dielectric layer below and at least partially overlapping the first gate spacer;
- removing the first sacrificial gate structure to form a first gate trench;
- and
- forming a metal gate structure in the first gate trench, the first gate spacer adjacent to the metal gate structure, and the dielectric layer remaining below and at least partially overlapping the first gate spacer.
4 more elements
A method of manufacturing a semiconductor device, comprising:
- forming a fin structure over a substrate, the fin structure including first semiconductor layers and second semiconductor layers alternately stacked;
- forming an insulation feature over the substrate and laterally with respect to the fin structure;
- forming a first dielectric layer over the insulation feature and over the fin structure;
- forming a first sacrificial gate structure over the insulation feature, the first dielectric layer between the first sacrificial gate structure and the insulation feature;
- forming a second dielectric layer laterally adjacent to the first sacrificial gate structure;
- removing the first sacrificial gate structure to form a dummy gate trench;
- and
- forming a dummy gate structure in the dummy gate trench, the first dielectric layer between the dummy gate structure and the insulation feature.
5 more elements
A semiconductor structure, comprising:
- channel structures disposed over a substrate;
- a gate structure engaging the channel structures;
- a source or drain feature in contact with the channel structures;
- an inner spacer interposing the gate structure and the source or drain feature;
- and
- a dielectric layer interposing the gate structure and the source or drain feature, the dielectric layer positioned above the inner spacer, and the dielectric layer being a different layer from the inner spacer.
3 more elements
Dependencies are inferred from the claim text.