Semiconductor device

A semiconductor device comprising:

• a CPU;
• a switch circuit;
• a first memory cell array;
• and
• a second memory cell array,
• wherein the CPU comprises a control circuit and a register circuit,
• wherein the register circuit comprises a flip-flop circuit and a backup circuit,
• wherein first memory cells are arranged in a matrix in the first memory cell array,
• wherein second memory cells are arranged in a matrix in the second memory cell array,
• wherein the first memory cell comprises a first transistor and a second transistor,
• wherein the second memory cell comprises a third transistor and a fourth transistor,
• wherein the control circuit and the flip-flop circuit are provided in a first layer,
• wherein the switch circuit and the backup circuit are provided in a second layer over the first layer,
• wherein the first transistor and the third transistor are provided in a third layer over the second layer,
• wherein the second transistor and the fourth transistor are provided in a fourth layer over the third layer,
• wherein the switch circuit is configured to supply a signal to one of the first memory cell and the second memory cell,
• wherein the control circuit and the flip-flop circuit each comprise a transistor comprising silicon in a channel formation region,
• wherein the switch circuit and the backup circuit each comprise a transistor comprising a metal oxide in a channel formation region, and
• wherein the first transistor, the second transistor, the third transistor, and the fourth transistor each comprise a metal oxide in a channel formation region.