Clock phase control to adjust the quantizer-dac delay for continuous-time pipelined adcs

A residue generation arrangement for use in a continuous-time analog-to-digital converter (ADC), the residue generation arrangement comprising:

• a first continuous-time stage including:
• a forward path including a continuous-time filter, the forward path coupled with an analog input and configured for receiving an analog input signal applied to the analog input and generating a delayed analog input signal;
• a feedforward path coupled in parallel with the forward path, the feedforward path including:
• a first quantizer for digitizing the analog input signal to generate a digital signal;
• and
• a digital-to-analog converter (DAC) coupled with an output of the first quantizer and configured for receiving the digital signal from the first quantizer and generating a feedforward path analog output signal based on the digital signal generated by the first quantizer;
• a summation node configured for generating a residue signal based on the delayed analog input signal and the feedforward path analog output signal;
• a timing adjustment circuit configured for receiving a clock signal and an adjustment signal and, in response, generating a delayed or advanced clock signal that is applied to a clock input of one or both of the first quantizer and the DAC to adjust a clock phase or clock delay of the feedforward path;
• and
• a calibration unit configured for controlling a relationship between the delayed clock signal and the clock signal applied to an input of the digital-to-analog converter (DAC).

A method of using an analog-to-digital converter (ADC), the method comprising:

• receiving an analog input signal applied to an analog input and generating a delayed analog input signal;
• digitizing, via a feedforward path, the analog input signal to generate a digital signal;
• receiving the digital signal and generating a feedforward path analog output signal based on the digital signal;
• generating a residue signal based on the delayed analog input signal and the feedforward path analog output signal;
• and
• receiving a clock signal and an adjustment signal and, in response, generating a delayed or advanced clock signal that is applied to a clock input of one or both of a quantizer and a digital-to-analog converter to adjust a clock phase or clock delay of the feedforward path.