First erase verify high peak current consumption solution

A controller in communication with a memory apparatus including memory cells each connected to one of a plurality of word lines and disposed in memory holes and configured to retain a threshold voltage corresponding to one of a plurality of data states, each of the memory holes defining a channel, the controller configured to:

• instruct the memory apparatus to apply an erase voltage pulse of an erase voltage to the channel of the memory holes including the memory cells being erased in each of a plurality of erase pulse phases of an erase operation followed by an erase verify pulse of an erase verify voltage applied to ones of the plurality of word lines connected to the memory cells being erased to verify the memory cells are erased in each of a plurality of erase verify phases of the erase operation;
• and
• instruct the memory apparatus to discharge the channel of the memory holes after each of the plurality of erase pulse phases and before each of the plurality of erase verify phases in each of a plurality of channel clean phases of the erase operation.

A method of operating a memory apparatus including memory cells each connected to one of a plurality of word lines and disposed in memory holes and configured to retain a threshold voltage corresponding to one of a plurality of data states, each of the memory holes defining a channel, the method comprising the steps of:

• applying an erase voltage pulse of an erase voltage to the channel of the memory holes including the memory cells being erased in each of a plurality of erase pulse phases of an erase operation followed by an erase verify pulse of an erase verify voltage applied to ones of the plurality of word lines connected to the memory cells being erased to verify the memory cells are erased in each of a plurality of erase verify phases of the erase operation;
• and
• discharging the channel of the memory holes after each of the plurality of erase pulse phases and before each of the plurality of erase verify phases in each of a plurality of channel clean phases of the erase operation.