Memory refresh

A memory device, comprising:

• a memory cell array comprising a matrix of a plurality of rows and a plurality of columns, wherein each row of the plurality of rows comprises a first plurality of memory cells connected to a word line of a plurality of word lines;
• and
• a first feedback circuit connected to the memory cell array, wherein the first feedback circuit comprises:
• a reference cell array connected to the memory cell array and operative to generate a sensing current that is representative of a leakage current of the memory cell array,
• a comparator connected to the reference cell array, wherein the comparator compares the sensing current with a reference current and provides an enable signal based on the comparison, and
• a charge pump connected to the comparator, wherein the charge pump generates a bias voltage based on the enable signal, wherein the bias voltage is applied to the plurality of word lines of the memory cell array in a standby mode.

A method of limiting a leakage current of a memory device, the method comprising:

• generating, by a reference cell array connected to a memory cell array of the memory device, a sensing current that is a representative of a leakage current of the memory cell array of the memory device;
• comparing, by a comparator connected to the reference cell array, the sensing current with a reference current;
• generating, by the comparator based on the comparison, an enable signal;
• and
• adjusting, by a negative voltage generator connected to the comparator, a bias voltage applied to a plurality of word lines of the memory cell array based on the enable signal.