Translating Between CXL.mem and UALink Facilitating CPU Access to Remote Accelerators and GPU Fabrics
AssigneeUnifabriX Ltd.
InventorsRonen Aharon Hyatt, Gaya Opal Hyatt, Ethan Sharon Hyatt, Gil Thieberger
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AssigneeUnifabriX Ltd.
InventorsRonen Aharon Hyatt, Gaya Opal Hyatt, Ethan Sharon Hyatt, Gil Thieberger
Estimating the term…
Enabling CXL hosts to reach memory resources within UALink accelerator fabrics opens new pathways for AI workload orchestration across heterogeneous compute domains. Some implementations describe receiving a CXL.mem M2S request comprising MemRd* and a first physical address from a first entity, translating the CXL.mem M2S request to a UALink UPLI request comprising a read command and a second physical address, sending the UPLI request to a second entity, receiving a UPLI read response comprising data, translating the UPLI read response to a CXL.mem S2M data response, and sending the CXL.mem S2M data response to the first entity. Other implementations describe an RPU comprising a CXL port and a UALink port, wherein the RPU translates between CXL.mem and UPLI. Yet other implementations describe a host, a UALink pod with a switch and accelerators, and an RPU translating CXL.mem requests from the host to UPLI requests directed to accelerators via the switch.
A method for translating from Compute Express Link (CXL) requests to Ultra Accelerator Link (UALink) Protocol Level Interface (UPLI) requests, comprising:
A system comprising:
A system comprising:
Dependencies are inferred from the claim text.