Apparatus and method for distributing and storing write data having different-type entries in plural memory regions

A memory controller coupled to a memory device, wherein the memory controller is configured to:

• determine the plural data entries among write data;
• store plural data entries in a first memory region comprising a memory block including a plurality of memory cells each configured to store multi-bit data;
• divide the plural data entries into the at least one sub-group;
• generate at least one partial parity entry corresponding to the at least one sub-group;
• store at least one partial parity entry corresponding to at least one sub-group in a third memory region comprising a memory block including a plurality of memory cells each configured to store single-bit data, each sub-group comprising a part of the plural data entries;
• generate a parity entry corresponding to the plural data entries based on the at least one partial parity entry;
• and
• store a parity entry corresponding to the plural data entries in a second memory region comprising a memory block including a plurality of memory cells each configured to store multi-bit data.