Method and system for fault tolerant rerouting for massively parallel processing array
AssigneeCornami, Inc.
InventorMartin Alan Franz, II
Life of this patent
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Abstract
A system and method to replace a defective tile of an array of tiles on a die is disclosed. Each tile in includes a plurality of processing cores. Each of the tiles are in communication with each other through a network. A defective tile is detected and a spare tile external to the tiles is selected. Packets sent on the network to the defective tile are directed to the spare tile. The function of the defective tile is assigned to the spare tile.
Claims20
A method to replace a defective tile of a plurality of tiles, each tile in the plurality of tiles including a plurality of processing cores, and each of the tiles are in communication with each other through a network, the method comprising:
- determining a defective tile of the plurality of tiles;
- selecting a spare tile external to the plurality of tiles;
- directing packets sent on the network to the defective tile to the spare tile;
- and
- assigning a function of the defective tile to the spare tile.
A computer system comprising:
- a plurality of tiles, each including a plurality of processing cores and an interconnection;
- a network coupled to the interconnections of each of the plurality of tiles to allow communication between the plurality of tiles;
- and
- a spare tile including a plurality of processing cores and an interconnection coupled to the network, the spare tile located external to the plurality of tiles, wherein the spare tile is selected when a defective tile of the plurality of tiles is determined, and wherein packets sent on the network to the defective tile are directed to the spare tile;
- and wherein a function of the defective tile is assigned to the spare tile.
Dependencies are inferred from the claim text.