Fetch skipping
AssigneeArm Limited
InventorKim Richard SCHUTTENBERG
Life of this patent
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Abstract
An apparatus includes no-op-compatible instruction tracking circuitry configured to store tracking information indicative of program counter addresses corresponding to no-op-compatible instructions architecturally permitted to be treated as a no-op instruction; and fetch skipping circuitry configured to determine, depending on whether a given fetch target address is identified as corresponding to a no-op-compatible instruction by the tracking information stored by the no-op-compatible instruction tracking circuitry, whether to skip fetching of a given instruction corresponding to the given fetch target address.
Claims20
An apparatus comprising:
- no-op-compatible instruction tracking circuitry configured to store tracking information indicative of program counter addresses corresponding to no-op-compatible instructions architecturally permitted to be treated as a no-op instruction;
- and
- fetch skipping circuitry configured to determine, depending on whether a given fetch target address is identified as corresponding to a no-op-compatible instruction by the tracking information stored by the no-op-compatible instruction tracking circuitry, whether to skip fetching of a given instruction corresponding to the given fetch target address.
A non-transitory computer-readable medium storing computer-readable code for fabrication of an apparatus comprising:
- no-op-compatible instruction tracking circuitry configured to store tracking information indicative of program counter addresses corresponding to no-op-compatible instructions architecturally permitted to be treated as a no-op instruction;
- and
- fetch skipping circuitry configured to determine, depending on whether a given fetch target address is identified as corresponding to a no-op-compatible instruction by the tracking information stored by the no-op-compatible instruction tracking circuitry, whether to skip fetching of a given instruction corresponding to the given fetch target address.
A method comprising:
- storing tracking information indicative of program counter addresses corresponding to no-op-compatible instructions architecturally permitted to be treated as a no-op instruction;
- and
- determining, depending on whether a given fetch target address is identified as corresponding to a no-op-compatible instruction by the tracking information stored by the no-op-compatible instruction tracking circuitry, whether to skip fetching of a given instruction corresponding to the given fetch target address.
Dependencies are inferred from the claim text.