Real-Time Agile Machine Cryptography Based on Reversible N-state Inverters

Abstract

Data is processed by cryptographic operations selected from encryption, decryption and hashing. N-state data elements with n an integer at least greater than 2 are processed based on an n-state reversible n-state inverter, which has an equivalent complete size of k1 bits and is derived from a sequence of data elements with an equivalent size of k2 bits with k1>k2. The sequence of data elements is preferably secret data, shared by at least 2 computing devices. The derived n-state reversible inverter may be a self-propagating n-state inverter generating different n-state reversible inverters. It may be generated by extending a shared key, by implementing a Feedback Shift Register, by an array vector multiplication, and/or by a radix-n transformation. A generated n-state reversible inverter is applied in a Finite Lab Transform of a 2-operand n-state computer function, including a 2-operand commutative involution not characterizable as an addition over a finite field.

Dependencies are inferred from the claim text.