Dynamic memory power capping with criticality awareness

A memory controller comprising:

• a pending queue configured to store memory requests classified as critical or non-critical;
• and
• circuitry configured to convey an indication of a number of critical memory requests stored in the pending queue to a component external to the memory controller;
• wherein the memory controller is further configured to prioritize service of the critical memory requests over the non-critical memory requests based at least in part on the indication.

A method comprising:

• storing, by circuitry, memory requests classified as critical or non-critical in a pending queue of a memory controller;
• conveying an indication of a number of critical memory requests stored in the pending queue to a component external to the memory controller;
• and
• prioritizing servicing of the critical memory requests over the non-critical memory requests based at least in part on the indication.

A system comprising:

• a memory subsystem;
• one or more processors;
• a memory controller comprising circuitry coupled to the memory subsystem and the one or more processors, the memory controller including a pending queue configured to store memory requests classified as critical or non-critical;
• and
• a component external to the memory controller;
• wherein the memory controller is configured to convey an indication of a number of critical memory requests stored in the pending queue to the external component and to prioritize service of the critical memory requests over the non-critical memory requests based at least in part on the indication.