Phase lock detector

A system for determining whether a first clock signal and a second clock signal are in phase;

• the system comprising:
• a first latch, arranged to receive the first clock signal;
• a second latch, arranged to receive the second clock signal;
• a first detector;
• and
• a second detector, arranged to receive the first clock signal and the second clock signal;
• wherein the first latch is arranged to latch when the first clock signal transitions from a first state to a second state;
• wherein the second latch is arranged to latch when the second clock signal transitions from a first state to a second state;
• wherein the first detector is configured to output a first detector output signal when the first latch and the second latch are latched;
• and
• wherein the second detector is arranged to generate a second detector output signal upon receiving the first detector output signal, the second detector output signal being indicative of whether both the first clock signal and the second clock signal are in the second state.