Rf switch structure design using local body bias techniques for reduced area

A communication device comprising:

• receive circuitry;
• transmit circuitry;
• and
• antenna switching circuitry, which is configured to transmit radio frequency signals between antennas and the receive circuitry and/or between the antennas and the transmit circuitry, wherein at least the antenna switching circuitry includes an RF switch structure comprising:
• a bottom wafer including a plurality of bottom active switch regions, a plurality of bias resistors, and a plurality of bottom hybrid bond (HB) vias, wherein:
• the plurality of bottom active switch regions is configured to provide bottom field-effect transistors (FETs), which are electrically coupled in series and surrounded by the plurality of bias resistors in a horizontal plane;
• and
• each of the plurality of bottom HB vias is exposed at a top surface of the bottom wafer and electrically connected to a corresponding one of the bottom FETs;
• and
• a top wafer bonded to and positioned over the bottom wafer and including a plurality of top active switch regions and a plurality of top HB vias, wherein:
• the plurality of top active switch regions is formed over the plurality of bottom active switch regions, respectively, and configured to provide top FETs that are electrically coupled in series;
• each of the plurality of top HB vias is exposed at a bottom surface of the top wafer, electrically connected to a corresponding one of the top FETs, and aligned with and directly connected to a corresponding one of the plurality of bottom HB vias, such that each of the top FETs is electrically parallel to a corresponding one of the bottom FETs;
• the plurality of bias resistors is configured to provide gate and source-drain direct current (DC) voltage biasing to each of the top FETs and each of the bottom FETs;
• and
• at least one of the top wafer and the bottom wafer further includes a plurality of local body bias circuits, which is configured to provide body DC voltage biasing to each of the top FETs and/or to each of the bottom FETs based on at least the gate DC voltage biasing.

A method of implementing a radio frequency (RF) switch structure comprising:

• forming a bottom wafer that includes a plurality of bottom active switch regions, a plurality of bias resistors, and a plurality of bottom hybrid bond (HB) vias, wherein:
• the plurality of bottom active switch regions is configured to provide bottom field-effect transistors (FETs), which are electrically coupled in series and surrounded by the plurality of bias resistors in a horizontal plane;
• and
• each of the plurality of bottom HB vias is exposed at a top surface of the bottom wafer and electrically connected to a corresponding one of the bottom FETs;
• forming a top wafer that includes a plurality of top active switch regions and a plurality of top HB vias, wherein:
• the plurality of top active switch regions is configured to provide top FETs that are electrically coupled in series;
• each of the plurality of top HB vias is exposed at a bottom surface of the top wafer and electrically connected to a corresponding one of the top FETs;
• and
• at least one of the top wafer and the bottom wafer further includes a plurality of local body bias circuits;
• and
• bonding the top wafer to the bottom wafer, wherein:
• each of the plurality of top HB vias is exposed at the bottom surface of the top wafer is aligned with and directly connected to a corresponding one of the plurality of bottom HB vias exposed at the top surface of the bottom wafer, such that each of the top FETs is electrically parallel to a corresponding one of the bottom FETs;
• the plurality of bias resistors is configured to provide gate and source-drain direct current (DC) voltage biasing to each of the top FETs and each of the bottom FETs;
• and
• the plurality of local body bias circuits is configured to provide body DC voltage biasing to each of the top FETs and/or to each of the bottom FETs based on at least the gate DC voltage biasing.