Heat sink for a semiconductor package, panel-level heat sink array and related manufacturing method

A heat sink for a semiconductor package, comprising:

• a top surface;
• a bottom surface which is opposite to the top surface;
• and
• a stepped structure;
• wherein the top surface of the heat sink is a first step plane of the stepped structure;
• the heat sink further includes a second step plane;
• and in a direction perpendicular to the top surface of the heat sink, the second step plane has a height difference from the first step plane.

A method for manufacturing a semiconductor package with an integrated heat sink:

• providing a panel-level chip unit array, wherein the panel-level chip unit array includes multiple chip units arranged in an array, and each chip unit includes at least one semiconductor die;
• providing a panel-level heat sink array, the panel-level heat sink array includes hollow regions, multiple heat sink units arranged in an array, and connection ribs connecting adjacent heat sink units;
• disposing each heat sink unit on a back surface of the at least one semiconductor die of each chip unit, wherein each heat sink unit has at least one connection rib;
• forming an encapsulation material layer, so that the encapsulation material layer wraps the heat sink units and the connection ribs;
• a singulation step is performed to obtain multiple semiconductor packages with integrated heat sink.