Semiconductor package and method of manufacturing the same
AssigneeSamsung Electronics Co., Ltd.
InventorsYonghyun Kim, Wonil Seo, Taejun Jeon
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AssigneeSamsung Electronics Co., Ltd.
InventorsYonghyun Kim, Wonil Seo, Taejun Jeon
Estimating the term…
A semiconductor package and a method of manufacturing the same are provided such that the total thickness of a package and the pitch of a chip pad are decreased thereby reducing cracks in wiring. The semiconductor package includes a package substrate, at least two semiconductor chips stacked on the package substrate, in a stepped structure, a side insulation layer disposed on one side surface of each of the at least two semiconductor chips, and a conductive connection pattern disposed on a slope surface of the side insulation layer, a portion of an upper surface of each of the at least two semiconductor chips, and a portion of an upper surface of the package substrate, the conductive connection pattern connecting the at least two semiconductor chips to the package substrate, wherein the conductive connection pattern includes a straight line portion and a bent line portion.
A semiconductor package comprising:
A semiconductor package comprising:
A semiconductor package comprising:
Dependencies are inferred from the claim text.