Horizontal transport gaa tunnel fets

A p-i-n junction semiconductor device, comprising:

• an extrinsically doped drain;
• an extrinsically doped source;
• a first intrinsically doped tunneling channel coupled between the extrinsically doped drain and the extrinsically doped source;
• a second intrinsically doped tunneling channel coupled between the extrinsically doped drain and the extrinsically doped source;
• and
• a gate coupled to both the first intrinsically doped tunneling channel and the second intrinsically doped tunneling channel,
• wherein an axis defined by the extrinsically doped drain and an axis defined by the extrinsically doped source are substantially parallel, and
• wherein the second intrinsically doped tunneling channel is stacked with regard to the first intrinsically doped tunneling channel along both the axis defined by the extrinsically doped drain and the axis defined by the extrinsically doped source.

A method of forming a p-i-n junction semiconductor device comprising:

• etching a plurality of canyons for sources and drains through a nanosheet stack of channel material sheets and sacrificial layers;
• etching out the sacrificial layers of the nanosheet stack;
• depositing a dielectric sacrificial material in the nanosheet stack;
• etching the plurality of canyons into the dielectric sacrificial material;
• laterally etching into the dielectric sacrificial material in the plurality of canyons;
• depositing an inner spacer into the plurality of canyons;
• etching the plurality of canyons into the inner spacer;
• laterally etching into the channel material sheets past the inner spacer in at least one canyon of the plurality of canyons to form lateral recesses;
• and
• epitaxially growing one of a source or a drain in the at least one canyon including the lateral recesses.