Integrate-and-hold circuit
OwnerBaher S. Haroun, Seyed Miaad Seyed Aliroteh +2inventors
InventorsBaher S. Haroun, Seyed Miaad Seyed Aliroteh, Brian P. Ginsburg, Robert Floyd Payne
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Abstract
An integrated circuit comprises an integrate-and-hold circuit including a degeneration network having a bias terminal, and a switch coupled between the bias terminal and a reference terminal, the switch configured to, in a hold phase of the integrate-and-hold circuit, connect the bias terminal to the reference terminal, and outside the hold phase of the integrate-and-hold circuit, disconnect the bias terminal from the reference terminal.
Claims22
An integrated circuit comprising:
- an integrate-and-hold circuit including a degeneration network, the degeneration network having a bias terminal;
- and
- a switch coupled between the bias terminal and a reference terminal, the switch configured to, in a hold phase of the integrate-and-hold circuit, connect the bias terminal to the reference terminal, and outside the hold phase of the integrate-and-hold circuit, disconnect the bias terminal from the reference terminal.
A method comprising, in each integrate-and-hold cycle of a plurality of integrate-and-hold cycles of an integrate-and-hold circuit:
- resetting a first capacitor and a second capacitor during a first time period;
- charging or discharging the first capacitor and the second capacitor during a second time period based on a differential input signal applied to a first control terminal of a first transistor and a second control terminal of a second transistor by disconnecting a bias terminal of a degeneration network of the integrate-and-hold circuit from a reference terminal;
- and
- deactivating the first transistor and the second transistor to maintain voltage levels at the first capacitor and the second capacitor during a third time period by connecting the bias terminal to the reference terminal.
Dependencies are inferred from the claim text.