Resistive random access memory cell array

Abstract

Numerous examples are disclosed of systems and methods for operating one or more arrays of resistive random access memory (RRAM) cells. In one example, a system comprises an array of resistive random access memory (RRAM) units arranged in rows and columns; and a sense amplifier for determining a differential value stored in a first RRAM unit and a second RRAM unit in the array, wherein the first RRAM unit comprises a first select transistor coupled to a first set of one or more RRAM cells and the second RRAM unit comprises a second select transistor coupled to a second set of one or more RRAM cells.

Dependencies are inferred from the claim text.