Input circuit
AssigneeSocionext Inc.
InventorKyota SHIMIZU
Life of this patent
Estimating the term…
Abstract
An input circuit includes an input buffer, a first voltage conversion circuit, a second voltage conversion circuit, and a third voltage conversion circuit. The input buffer includes: first and second transistors serially connected between a first power supply and an output terminal; and third and fourth transistors serially connected between a second power supply and the output terminal. The first voltage conversion circuit is provided between an input terminal and a second node connected to the gate of the first transistor. The second voltage conversion circuit is provided between the input terminal and a fifth node connected to the gate of the third transistor. The third voltage conversion circuit is provided between the second node and a third node connected to the gates of the second transistor and the fourth transistor.
Claims12
An input circuit comprising an input buffer, a first voltage conversion circuit, a second voltage conversion circuit, and a third voltage conversion circuit, wherein
- the input buffer includes
- a first transistor of a first conductivity type having a source connected to a first power supply, a drain connected to a first node, and a gate connected to a second node,
- a second transistor of the first conductivity type having a source connected to the first node, a drain connected to an output terminal, and a gate connected to a third node,
- a third transistor of a second conductivity type having a source connected to a second power supply, a drain connected to a fourth node, and a gate connected to a fifth node, and
- a fourth transistor of the second conductivity type having a source connected to the fourth node, a drain connected to the output terminal, and a gate connected to the third node,
- the first voltage conversion circuit includes
- a fifth transistor of the first conductivity type provided between an input terminal and the second node and having a gate connected to a first bias power supply, and
- a sixth transistor of the first conductivity type provided between the first bias power supply and the second node and having a gate connected to the input terminal,
- the second voltage conversion circuit includes
- a seventh transistor of the second conductivity type provided between the input terminal and the fifth node and having a gate connected to a second bias power supply, and
- an eighth transistor of the second conductivity type provided between the second bias power supply and the fifth node and having a gate connected to the input terminal, and
- the third voltage conversion circuit includes
- a ninth transistor of the second conductivity type provided between the second node and the third node and having a gate connected to the second bias power supply, and
- a tenth transistor of the second conductivity type provided between the second bias power supply and the third node and having a gate connected to the second node.
An input circuit comprising an input buffer, a first voltage conversion circuit, a second voltage conversion circuit, and a third voltage conversion circuit, wherein
- the input buffer includes
- a first transistor of a first conductivity type having a source connected to a first power supply, a drain connected to a first node, and a gate connected to a second node,
- a second transistor of the first conductivity type having a source connected to the first node, a drain connected to an output terminal, and a gate connected to a third node,
- a third transistor of a second conductivity type having a source connected to a second power supply, a drain connected to a fourth node, and a gate connected to a fifth node, and
- a fourth transistor of the second conductivity type having a source connected to the fourth node, a drain connected to the output terminal, and a gate connected to the third node,
- the first voltage conversion circuit includes
- a fifth transistor of the first conductivity type provided between an input terminal and the second node and having a gate connected to a first bias power supply, and
- a sixth transistor of the first conductivity type provided between the first bias power supply and the second node and having a gate connected to the input terminal,
- the second voltage conversion circuit includes
- a seventh transistor of the second conductivity type provided between the input terminal and the fifth node and having a gate connected to a second bias power supply, and
- an eighth transistor of the second conductivity type provided between the second bias power supply and the fifth node and having a gate connected to the input terminal, and
- the third voltage conversion circuit includes
- a ninth transistor of the first conductivity type provided between the input terminal and a sixth node and having a gate connected to the first bias power supply,
- a tenth transistor of the first conductivity type provided between the first bias power supply and the sixth node and having a gate connected to the input terminal,
- an eleventh transistor of the second conductivity type provided between the sixth node and the third node and having a gate connected to the second bias power supply, and
- a twelfth transistor of the second conductivity type provided between the second bias power supply and the third node and having a gate connected to the sixth node.
Dependencies are inferred from the claim text.