Apparatus, system, and method of compiling code for a processor

A product comprising one or more tangible computer-readable non-transitory storage media comprising computer-executable instructions operable to, when executed by at least one processor, enable the at least one processor to cause a compiler to:

• identify a plurality of memory-access operations in a loop based on a source code to be compiled into a target code to be executed by a target processor, the plurality of memory-access operations comprising at least a first memory-access operation and a second memory-access operation to a same memory pointer, wherein the first memory-access operation has a first offset, the second memory-access operation has a second offset different from the first offset;
• configure Address Generation Unit (AGU) configuration code to configure the plurality of memory-access operations by a same AGU;
• and
• generate the target code based on compilation of the source code, wherein the target code is based on the AGU configuration code.

A computing system comprising:

• at least one memory to store instructions;
• and
• at least one processor to retrieve the instructions from the memory and to execute the instructions to cause the computing system to:
• identify a plurality of memory-access operations in a loop based on a source code to be compiled into a target code to be executed by a target processor, the plurality of memory-access operations comprising at least a first memory-access operation and a second memory-access operation to a same memory pointer, wherein the first memory-access operation has a first offset, the second memory-access operation has a second offset different from the first offset;
• configure Address Generation Unit (AGU) configuration code to configure the plurality of memory-access operations by a same AGU;
• and
• generate the target code based on compilation of the source code, wherein the target code is based on the AGU configuration code.