Substrate testing apparatus

A substrate testing apparatus comprising:

• a substrate support including a first surface configured to support a substrate and a second surface opposite to the first surface, and a photographing hole penetrating the first surface and the second surface;
• a camera arranged below the second surface of the substrate support, and configured to photograph skeleton chips through the photographing hole of the substrate support;
• and
• a probe device arranged above the substrate support, and configured to apply a voltage to the skeleton chips,
• wherein the probe device comprises:
• a probe pin configured to contact a chip bump arranged on an upper surface of a skeleton chip;
• a probe card in contact with an upper surface of the probe pin;
• and
• a lower plate arranged under a lower surface of the probe card,
• wherein a vertical level of a lower surface of the lower plate is lower than a vertical level of a lower surface of the probe pin, and
• wherein the lower plate surrounds an outer circumferential surface of the probe pin, and does not cover the lower surface of the probe pin.

A substrate testing apparatus comprising:

• a housing including an opening in a portion of an upper plate of the housing;
• a substrate support including a first surface configured to support a substrate and a second surface opposite to the first surface, and a photographing hole penetrating the first surface and the second surface;
• a camera arranged in an inner space of the housing below the second surface of the substrate support, and configured to photograph skeleton chips through the photographing hole of the substrate support when the skeleton chips are disposed on the substrate support;
• a lens arranged on an upper portion of the camera;
• a probe device arranged above the substrate support, and configured to apply a voltage to the skeleton chips;
• and
• a logic tester, a probe interface board, and an interface unit connected to an upper portion of the probe device,
• wherein the probe device comprises:
• a probe pin configured to contact a chip bump arranged on an upper surface of a skeleton chip;
• a probe card in contact with an upper surface of the probe pin;
• a lower plate arranged under a lower surface of the probe card;
• and
• a support protrusion arranged under the lower plate, and configured to be detachable, and
• wherein a vertical level of a lower surface of the support protrusion is lower than a vertical level of a lower surface of the probe pin,
• wherein the probe device comprises a hole on a lower portion of the probe device,
• wherein the hole is a space surrounded by a lower surface of the probe pin and the support protrusion and configured such that the chip bump is inserted in the hole,
• wherein the probe device is configured to uniformly apply pressure onto an entirety of a chip contact surface of the skeleton chip when the probe device is in contact with the skeleton chip, wherein the chip contact surface is a region of an upper surface of the skeleton chip except for a region where chip bumps are disposed, and
• wherein the lower plate and the support protrusion are configured such that a sum of respective lengths in a vertical direction of the lower plate and the support protrusion is a same as a sum of respective lengths in the vertical direction of the probe pin and the chip bump.