Semiconductor device and method of detecting failure therein

A semiconductor device, comprising:

• a substrate including a front surface and a rear surface, which are opposite to each other;
• a first transistor adjacent the front surface of the substrate, the first transistor comprising a first gate electrode and first source/drain patterns adjacent to both sides of the first gate electrode;
• a second transistor adjacent the front surface of the substrate, the second transistor comprising a second gate electrode and second source/drain patterns adjacent to both sides of the second gate electrode;
• a first interlayer insulating layer disposed on the first transistor;
• a first front-side detection structure disposed on the first interlayer insulating layer and connected to the first gate electrode;
• a second front-side detection structure disposed on the first interlayer insulating layer and connected to the second gate electrode;
• a first back-side detection structure adjacent the rear surface of the substrate;
• a first penetration via penetrating the first interlayer insulating layer and the substrate and connecting the first front-side detection structure to the first back-side detection structure;
• a second back-side detection structure adjacent the rear surface of the substrate;
• and
• a second penetration via penetrating the first interlayer insulating layer and the substrate and connecting the second front-side detection structure to the second back-side detection structure,
• wherein a first level of a lower end of the first back-side detection structure is equal to a second level of a lower end of the second back-side detection structure.

A semiconductor device, comprising:

• a substrate including a front surface and a rear surface, which are opposite to each other;
• a flip-flop circuit adjacent the front surface of the substrate;
• a first transistor adjacent the front surface of the substrate, the first transistor comprising a first gate electrode and first source/drain patterns adjacent to both sides of the first gate electrode, the first transistor being included in the flip-flop circuit;
• a first interlayer insulating layer disposed on the first transistor;
• a first front-side detection structure disposed on the first interlayer insulating layer and connected to the first gate electrode;
• a first back-side detection structure adjacent the rear surface of the substrate;
• a first penetration detection structure connecting the first front-side detection structure to the first back-side detection structure;
• a power line adjacent the rear surface of the substrate;
• and
• a back-side interconnection structure disposed below the power line and connected to the power line,
• wherein the first penetration detection structure comprises a front-side contact penetrating the first interlayer insulating layer, a first back-side contact penetrating a portion of the substrate, and a connection conductive pattern between the front-side contact and the first back-side contact, and
• the connection conductive pattern and the first source/drain patterns are doped with the same dopants.