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US 2026/0123537 A1Published application
Semiconductor package and manufacturing method thereof
AssigneeSK hynix Inc.
InventorsHeon Yong CHANG, Young Hun CHEONG
Life of this patent
Estimating the term…
Abstract
A semiconductor package may include a semiconductor chip; a bonding wire having one end that contacts an upper surface of the semiconductor chip; a landing pad contacting the other end of the bonding wire, and facing the upper surface of the semiconductor chip; a coating layer disposed between the landing pad and the semiconductor chip, surrounding a side surface of the bonding wire, and including a hole; and an encapsulation layer surrounding the coating layer.
Claims20
A semiconductor package comprising:
- a semiconductor chip;
- a bonding wire having one end that contacts an upper surface of the semiconductor chip;
- a landing pad contacting the other end of the bonding wire, and facing the upper surface of the semiconductor chip;
- a coating layer disposed between the landing pad and the semiconductor chip, surrounding a side surface of the bonding wire, and including a hole;
- and
- an encapsulation layer surrounding the coating layer.
3 more elements
A semiconductor package comprising:
- a first semiconductor chip;
- a second semiconductor chip positioned on the first semiconductor chip;
- a first bonding wire connected to the first semiconductor chip;
- a second bonding wire connected to the second semiconductor chip;
- a first coating layer surrounding a side surface of the first bonding wire, and including a first hole;
- a second coating layer surrounding a side surface of the second bonding wire, including a second hole, and spaced apart from the first coating layer;
- and
- an encapsulation layer surrounding the first coating layer and the second coating layer, and filling interiors of the first hole and the second hole.
5 more elements
A method for manufacturing a semiconductor package, the method comprising:
- connecting one end of a bonding wire to a semiconductor chip, and aligning the bonding wire in a direction perpendicular to an upper surface of the semiconductor chip;
- forming a coating layer that surrounds a side surface of the bonding wire and includes a hole;
- and
- forming an encapsulation layer to surround a side surface of the coating layer and fill an interior of the hole.
1 more element
Dependencies are inferred from the claim text.