Wafer level packaging having redistribution layer formed utilizing laser direct structuring
AssigneeStmicroelectronics Pte Ltd
InventorJing-En LUAN
Life of this patent
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AssigneeStmicroelectronics Pte Ltd
InventorJing-En LUAN
Estimating the term…
A wafer-level package includes an integrated circuit (IC) die with pads on its front side. Surrounding the die's edge sides and front side is a resin layer containing an activatable catalyst material. A first passivation layer is positioned with its back surface contacting the front of the resin layer adjacent the die's front side, and a first solder resist layer is placed with its back surface contacting the front of the passivation layer. The redistribution layer includes first activated portions of the resin layer near the pads, forming electrical connections from the pads to the resin's back surface. Second activated portions extend along the resin's back surface toward the edge sides, while third activated portions run along the resin layer surrounding the die's edge sides. A first interconnect structure extends from the second activated portions, through the passivation and solder resist layers.
A wafer-level package, comprising:
An apparatus, comprising:
Dependencies are inferred from the claim text.