US 2026/0107798 A1 · SEMICONDUCTOR PACKAGE DEVICE AND PACKAGE SUBSTRATE THEREOF

Abstract

A package substrate comprises a solder mask layer, a composite layer, a ground layer, and a signal layer. Multiple power contacts, multiple ground contacts, multiple first signal contacts, and multiple second signal contacts are arranged on the solder mask layer. Multiple power planes and multiple first signal routings are arranged on the composite layer. The power planes are correspondingly coupled to the power contacts. The first signal routings are correspondingly coupled to the first signal contacts. A ground line is arranged on the ground layer. The ground line is coupled to the ground contacts. Multiple second signal routings are arranged on the signal layer. The second signal routings are correspondingly coupled to the second signal contacts.

Claims19

Dependent claims

A package substrate, comprising:

a solder mask layer, on which a plurality of power contacts, a plurality of ground contacts, a plurality of first signal contacts and a plurality of second signal contacts are arranged;
a composite layer, on which a plurality of power planes and a plurality of first signal routings are arranged, wherein the plurality of power planes are correspondingly coupled to the plurality of power contacts, and the plurality of first signal routings are correspondingly coupled to the plurality of first signal contacts;
a ground layer, on which a ground line is arranged, wherein the ground line is coupled to the plurality of ground contacts;
and
a signal layer, on which a plurality of second signal routings are arranged, wherein the plurality of second signal routings are correspondingly coupled to the plurality of second signal contacts.

2 more elements

Dependencies are inferred from the claim text.

Semiconductor package device and package substrate thereof

Life of this patent

Semiconductor package device and package substrate thereof

Life of this patent

Abstract

Claims19