Semiconductor package

A semiconductor package comprising:

• a redistribution layer;
• a plurality of encapsulants and a plurality of substrates alternately arranged on the redistribution layer;
• a plurality of memory dies at least partially disposed in cavities penetrating each of the plurality of substrates and at least partially covered by the plurality of encapsulants, respectively;
• and
• a plurality of connection vias penetrating at least one of the plurality of encapsulants and the plurality of substrates and solderlessly connected to the plurality of memory dies, respectively, and connecting each of the plurality of memory dies to the redistribution layer.

A semiconductor package comprising:

• a redistribution layer;
• and
• a stack of layer structures disposed on the redistribution layer, wherein each respective layer structure in the stack of layer structures comprises:
• a corresponding substrate having (i) a corresponding first surface facing the redistribution layer and (ii) a corresponding second surface opposite to the corresponding first surface;
• a corresponding cavity disposed in the corresponding substrate and penetrating at least the corresponding first surface of the corresponding substrate;
• a corresponding semiconductor chip at least partially disposed in the corresponding cavity, the corresponding semiconductor chip having (i) a corresponding front surface facing the redistribution layer and (ii) a corresponding connection pad facing the redistribution layer and electrically connected to the redistribution layer;
• and
• a corresponding encapsulant having (i) a first portion filling a portion of the corresponding cavity and (ii) a second portion covering the corresponding front surface of the corresponding semiconductor chip, the corresponding first surface of the corresponding substrate, and one of the redistribution layer and a second surface of a substrate of an adjacent layer structure in the stack of layer structures.