US 2026/0107753 A1 · NANO THROUGH SUBSTRATE VIAS FOR SEMICONDUCTOR DEVICES AND RELATED SYSTEMS AND METHODS

Abstract

Semiconductor devices having nano through substrate vias (TSVs), and related systems and methods, are disclosed herein. In some embodiments, the semiconductor device includes a semiconductor substrate that has a first surface and a second surface opposite the first surface. A trench is formed in the first surface and filled with a dielectric material and a TSV extends from the first surface to the second surface within the footprint of the trench. In some embodiments, the TSV includes a conductive material that includes a first portion and a second portion. The first portion includes a first end at the first surfacer and a second end with a larger cross-sectional area than the first end. Similarly, the second portion includes a third end coupled to the second end and a fourth end at the second surface with a larger cross-sectional area than the third end.

Claims20

Dependent claims

A method for manufacturing a semiconductor substrate, the method comprising:

removing material from a first side of the semiconductor substrate to form a trench that isolates one or more pillars of the semiconductor substrate;
filling the trench with a dielectric material to surround the one or more pillars;
forming an aperture in a second side of the semiconductor substrate opposite the first side, wherein the aperture is at least partially vertically aligned with at least one pillar from the one or more pillars, and wherein a base surface of the aperture is at a depth corresponding to a base of the at least one pillar;
etching the at least one pillar through the base of the aperture to form an opening extending from the first side to the second side;
and
filling the opening with a conductive material to form a conductive through substrate via.

3 more elements

A method for manufacturing a semiconductor device, comprising:

forming a socket into a semiconductor substrate, wherein the socket extends from a first surface of the semiconductor substrate toward a second surface opposite the first surface, and wherein the socket comprises a dielectric material surrounding a plurality of pillars of the semiconductor substrate;
exhuming an individual one of the plurality of pillars through the second surface of the semiconductor substrate to form an opening extending from the second surface to the first surface;
and
filling the opening with a conductive material to form a conductive through substrate via.

1 more element

Dependencies are inferred from the claim text.

Nano through substrate vias for semiconductor devices and related systems and methods

Life of this patent

Nano through substrate vias for semiconductor devices and related systems and methods

Life of this patent

Abstract

Claims20