Display apparatus, method of manufacturing the same, and electronic apparatus

A display apparatus comprising:

• a substrate;
• a first semiconductor layer arranged over the substrate;
• a first gate layer arranged over the first semiconductor layer;
• a second gate layer arranged over the first gate layer;
• a first interlayer insulating layer arranged over the second gate layer, the first interlayer insulating layer includes a groove pattern having a downwardly concave shape;
• a second semiconductor layer arranged over the first interlayer insulating layer, the second semiconductor layer comprising an oxide semiconductor;
• a third gate layer arranged over the second semiconductor layer, the third gate layer is electrically connected to the second gate layer;
• and
• a first conductive layer arranged over the third gate layer, the first conductive layer is electrically connected to the second semiconductor layer,
• wherein the second semiconductor layer is arranged in the groove pattern.

An electronic apparatus comprising:

• a memory storing a command;
• a processor performing an operation according to the command and generating a control command;
• and
• a display panel displaying a screen according to the control command,
• wherein the display panel comprises:
• a substrate;
• a first semiconductor layer arranged over the substrate;
• a first gate layer arranged over the first semiconductor layer;
• a second gate layer arranged over the first gate layer;
• a first interlayer insulating layer arranged over the second gate layer, the first interlayer insulating layer including a groove pattern having a downwardly concave shape;
• a second semiconductor layer arranged over the first interlayer insulating layer, the second semiconductor layer comprising an oxide semiconductor;
• a third gate layer arranged over the second semiconductor layer;
• and
• a first conductive layer arranged over the third gate layer, the first conductive layer is electrically connected to the second gate layer,
• wherein a portion of the second semiconductor layer is arranged in the groove pattern.