Apparatus and Method for Wide Input Range Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) with Integrated Voltage Attenuation

A method of performing Successive approximation register (SAR) Analog-to-Digital (ADC) conversion, comprising:

• (a) a series capacitor (Cx) and capacitive digital-to-analog converter (DAC) comprising a plurality of capacitors and switches connected to input, a reference voltage or ground, and
• (b) a sampling circuit with switches configured to attenuate an input voltage that exceeds the supply voltage (VDD) by a predefined factor, allowing the ADC to process input signals exceeding the supply voltage, and
• (c) a comparator and binary search logic wherein the comparator output and binary search logic control the associated switches 12. The method of claim 11, comprising attenuating the input voltage using a series capacitor (Cx) and DAC capacitors, with the value of Cx being a fraction of a total capacitance of the DAC.