US 2026/0105897 A1Published application

Display device

AssigneeSemiconductor Energy Laboratory Co., Ltd.

InventorsHidetomo KOBAYASHI, Kei TAKAHASHI, Shunpei YAMAZAKI

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Abstract

A display device with favorable display quality is provided. A display portion where a plurality of pixels is arranged in a matrix is divided into Region A and Region B, i.e., regions on the upstream side and the downstream side of a scanning direction. A signal line for supplying an image signal is provided in each of Region A and Region B. Region A and Region B adjoin each other such that a boundary line showing the boundary between the regions is bent. Bending the boundary line suppresses formation of a stripe in a boundary portion. For example, in a given column, the total number of pixels electrically connected to a signal line in Region A is made different from the total number of pixels electrically connected to a signal line in Region B.

Claims3

Dependent claims

A display device comprising:

a display portion, the display portion comprising:
a first pixel electrode;
a first capacitor electrically connected to the first pixel electrode;
a first transistor, one of a source electrode and a drain electrode of the first transistor being electrically connected to the first capacitor;
a second pixel electrode;
a second capacitor electrically connected to the second pixel electrode;
a second transistor, one of a source electrode and a drain electrode of the second transistor being electrically connected to the second capacitor;
a scan line electrically connected to a gate of the first transistor;
a first signal line electrically connected to the other of the source electrode and the drain electrode of the first transistor;
and
a second signal line electrically connected to the other of the source electrode and the drain electrode of the second transistor,
wherein the display device further comprises:
a first conductive layer configured to function as the scan line;
a second conductive layer configured to function as the first signal line;
a third conductive layer configured to function as the second signal line;
a fourth conductive layer configured to function as the first pixel electrode;
a fifth conductive layer configured to function as the second pixel electrode;
an oxide semiconductor layer comprising a channel formation region of the second transistor;
and
a sixth conductive layer electrically connecting the oxide semiconductor layer and the third conductive layer,
wherein, in a plan view, the first conductive layer comprises a region extending in a first direction in the display portion,
wherein, in the plan view, the second conductive layer comprises a region extending in a second direction intersecting the first direction in the display portion,
wherein, in the plan view, the third conductive layer comprises a region extending in the second direction in the display portion,
wherein the first pixel electrode and the second pixel electrode are arranged adjacent to each other along the second direction,
wherein, in the plan view, the oxide semiconductor layer does not comprise a region overlapping with the second conductive layer and a region overlapping with the third conductive layer,
wherein the sixth conductive layer comprises a region extending in the first direction,
wherein the sixth conductive layer comprises a region intersecting the second conductive layer,
wherein, in the plan view, the second conductive layer comprises a region positioned between the fourth conductive layer and the third conductive layer and a region positioned between the fifth conductive layer and the third conductive layer, and
wherein, in the plan view, the sixth conductive layer comprises a region positioned between the first conductive layer and the oxide semiconductor layer.

26 more elements

A display device comprising:

a display portion, the display portion comprising:
a first pixel electrode;
a first capacitor electrically connected to the first pixel electrode;
a first transistor, one of a source electrode and a drain electrode of the first transistor being electrically connected to the first capacitor;
a second pixel electrode;
a second capacitor electrically connected to the second pixel electrode;
a second transistor, one of a source electrode and a drain electrode of the second transistor being electrically connected to the second capacitor;
a scan line electrically connected to a gate of the first transistor;
a first signal line electrically connected to the other of the source electrode and the drain electrode of the first transistor;
and
a second signal line electrically connected to the other of the source electrode and the drain electrode of the second transistor,
wherein the display device further comprises:
a first conductive layer configured to function as the scan line;
a second conductive layer configured to function as the first signal line;
a third conductive layer configured to function as the second signal line;
a fourth conductive layer configured to function as the first pixel electrode;
a fifth conductive layer configured to function as the second pixel electrode;
an oxide semiconductor layer comprising a channel formation region of the second transistor;
and
a sixth conductive layer electrically connecting the oxide semiconductor layer and the third conductive layer,
wherein, in a plan view, the first conductive layer comprises a region extending in a first direction in the display portion,
wherein, in the plan view, the second conductive layer comprises a region extending in a second direction intersecting the first direction in the display portion,
wherein, in the plan view, the third conductive layer comprises a region extending in the second direction in the display portion,
wherein the first pixel electrode and the second pixel electrode are arranged adjacent to each other along the second direction,
wherein, in the plan view, the oxide semiconductor layer does not comprise a region overlapping with the second conductive layer and a region overlapping with the third conductive layer,
wherein the sixth conductive layer comprises a region extending in the first direction,
wherein the sixth conductive layer comprises a region intersecting the second conductive layer,
wherein, in the plan view, the fourth conductive layer does not comprise a region overlapping with the second conductive layer and a region overlapping with the third conductive layer,
wherein, in the plan view, the second conductive layer comprises a region positioned between the fourth conductive layer and the third conductive layer and a region positioned between the fifth conductive layer and the third conductive layer, and
wherein, in the plan view, the sixth conductive layer comprises a region positioned between the first conductive layer and the oxide semiconductor layer.

27 more elements

A display device comprising:

a display portion, the display portion comprising:
a first pixel electrode;
a first capacitor electrically connected to the first pixel electrode;
a first transistor, one of a source electrode and a drain electrode of the first transistor being electrically connected to the first capacitor;
a second pixel electrode;
a second capacitor electrically connected to the second pixel electrode;
a second transistor, one of a source electrode and a drain electrode of the second transistor being electrically connected to the second capacitor;
a scan line electrically connected to a gate of the first transistor;
a first signal line electrically connected to the other of the source electrode and the drain electrode of the first transistor and a circuit included in a first signal line driver circuit;
and
a second signal line electrically connected to the other of the source electrode and the drain electrode of the second transistor,
wherein the display device further comprises:
a first conductive layer configured to function as the scan line;
a second conductive layer configured to function as the first signal line;
a third conductive layer configured to function as the second signal line;
a fourth conductive layer configured to function as the first pixel electrode;
a fifth conductive layer configured to function as the second pixel electrode;
an oxide semiconductor layer comprising a channel formation region of the second transistor;
and
a sixth conductive layer electrically connecting the oxide semiconductor layer and the third conductive layer,
wherein, in a plan view, the first conductive layer comprises a region extending in a first direction in the display portion,
wherein, in the plan view, the second conductive layer comprises a region extending in a second direction intersecting the first direction in the display portion,
wherein, in the plan view, the third conductive layer comprises a region extending in the second direction in the display portion,
wherein the first pixel electrode and the second pixel electrode are arranged adjacent to each other along the second direction,
wherein, in the plan view, the oxide semiconductor layer does not comprise a region overlapping with the second conductive layer and a region overlapping with the third conductive layer,
wherein the sixth conductive layer comprises a region extending in the first direction,
wherein the sixth conductive layer comprises a region intersecting the second conductive layer,
wherein, in the plan view, the second conductive layer comprises a region positioned between the fourth conductive layer and the third conductive layer and a region positioned between the fifth conductive layer and the third conductive layer,
wherein, in the plan view, the sixth conductive layer comprises a region positioned between the first conductive layer and the oxide semiconductor layer, and
wherein the circuit included in the first signal line driver circuit comprises a third transistor comprising a polycrystalline semiconductor.

27 more elements

Dependencies are inferred from the claim text.

Facts

Application: 19/419,497Filed 15 Dec 2025
Priority: JP 2017-00537616 Jan 2017
Published: 16 Apr 2026
Term ends: Not estimatedThe source records don’t support an estimate.

Classification29 codes

G09G 3/3648
Control of matrices with row and column drivers: using an active matrix
G02B 27/01
Optical systems or apparatus not provided for by any of the groups G02B1/00 - G02B26/00, G02B30/00: head-up displays
G02B 27/017
Head-up displays: head mounted
G02F 1/1343
Constructional arrangements; Manufacturing methods: electrodes

Family

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From the US filing history. Foreign family members aren’t listed.

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