Semiconductor device and semiconductor module

A semiconductor device that is a chip-size-package type semiconductor device, the semiconductor device comprising:

• a semiconductor layer;
• one or more vertical metal-oxide semiconductor (MOS) transistors that are provided in the semiconductor layer;
• a passivation layer that is located above a top surface of the semiconductor layer and includes a plurality of openings;
• a plurality of pads each of which is exposed to outside of the passivation layer in a corresponding one of the plurality of openings and functions as a terminal of one of the one or more vertical MOS transistors;
• and
• a plurality of metal redistributions that are located above the top surface of the semiconductor layer and each of which is connected to one or more pads that are different from each other among the plurality of pads,
• wherein in a plan view of the semiconductor device:
• the passivation layer is contained within the semiconductor layer;
• and
• each of the plurality of metal redistributions is contained within the semiconductor layer and contains the one or more pads connected to the metal redistribution,
• the plurality of metal redistributions include a plurality of first metal redistributions each of which includes a first portion and a second portion contained within the first portion in the plan view, the second portion being located above the first portion and having an area smaller than an area of the first portion in the plan view,
• each of the plurality of first metal redistributions includes one or more line-shaped bends in a boundary portion between the first portion and the second portion on a surface of the first metal redistribution, the one or more line-shaped bends each having an interior angle of at least 180 degrees in a cross section of the first metal redistribution,
• in the plan view, the one or more line-shaped bends include a portion facing a peripheral side of the semiconductor device, and
• a length of the second portion in a direction in which a normal line extends from the top surface of the semiconductor layer is greater than a length of the first portion in the direction.