US 2026/0101788 A1 · SEMICONDUCTOR PACKAGE INCLUDING A MOLDED UNDERFILL STRUCTURE, AND A PACKAGE SUBSTRATE

Abstract

A semiconductor package includes a package substrate including a body layer and a first insulating layer disposed on the body layer, first and second semiconductor chips mounted on the package substrate, and a molding layer filling the spaces between the package substrate and the first and second semiconductor chips, the molding layer surrounding the first and second semiconductor chips. The body layer includes a first chip overlapping region that vertically overlaps the first semiconductor chip, a second chip overlapping region that vertically overlaps the second semiconductor chip, and an intermediate region between the first chip overlapping region and the second chip overlapping region. The first insulating layer includes a first opening vertically overlapping a first side surface of the first semiconductor chip facing the second semiconductor chip and a second side surface of the second semiconductor chip facing the first semiconductor chip.

Claims20

Dependent claims

A semiconductor package comprising:

a package substrate including a body layer and a first insulating layer that is disposed on the body layer;
a first semiconductor chip mounted on the package substrate by a first bump;
a second semiconductor chip mounted on the package substrate by a second bump;
and
a molding layer filling the space between the package substrate and the first semiconductor chip and the space between the package substrate and the second semiconductor chip, the molding layer surrounding the first and second semiconductor chips,
wherein the body layer includes a first chip overlapping region that vertically overlaps the first semiconductor chip, a second chip overlapping region that vertically overlaps the second semiconductor chip, and an intermediate region between the first chip overlapping region and the second chip overlapping region, and
wherein the first insulating layer includes a first opening that exposes the intermediate region, an edge section of the first chip overlapping region abutting the intermediate region, and an edge section of the second chip overlapping region abutting the intermediate region.

4 more elements

A semiconductor package comprising:

a package substrate including a body layer and a first insulating layer that is disposed on the body layer;
a first semiconductor chip mounted on the package substrate by a first bump;
a second semiconductor chip mounted on the package substrate by a second bump;
and
a molding layer filling the space between the package substrate and the first semiconductor chip and the space between the package substrate and the second semiconductor chip, the molding layer covering the first and second semiconductor chips,
wherein the first insulating layer includes a first opening that vertically overlaps side surfaces of the first semiconductor chip and side surfaces of the second semiconductor chip.

3 more elements

Dependencies are inferred from the claim text.

Semiconductor package including a molded underfill structure, and a package substrate

Life of this patent

Semiconductor package including a molded underfill structure, and a package substrate

Life of this patent

Abstract

Claims20