Semiconductor device and fabrication methods thereof

A method of forming a semiconductor device, the method comprising:

• forming a semiconductor structure comprises a semiconductor layer and a transistor having a first terminal, a second terminal and a third terminal on a first side of the semiconductor layer;
• forming a first interconnect layer stacked on the first side of the semiconductor layer along a first direction, wherein the first interconnect layer comprises a first dielectric layer and a first metal structure in the first dielectric layer, wherein the first metal structure comprises a first electrode electrically coupled to the first terminal of the transistor and a second electrode electrically coupled to the third terminal of the transistor, wherein the first electrode and the second electrode are separated from each other along a second direction perpendicular to the first direction;
• forming a second interconnect layer stacked on a second side of the semiconductor layer opposite to the first side along the first direction, wherein the second interconnect layer comprises a second dielectric layer and a second metal structure in the second dielectric layer;
• forming a first conductive structure that extends from the first interconnect layer, through the semiconductor layer, into the second interconnect layer along the first direction, wherein the first conductive structure is connected to the first metal structure and the second metal structure along the first direction;
• and
• forming a second conductive structure comprises a conductive filling that is connected to the second electrode of the first metal structure.

A memory system, comprising:

• a memory device;
• and
• a memory controller electrically coupled to the memory device and configured to control the memory device,
• wherein the memory device comprises:
• a semiconductor structure comprises a semiconductor layer and a transistor having a first terminal, a second terminal and a third terminal on a first side of the semiconductor layer;
• a first interconnect layer stacked on the first side of the semiconductor layer along a first direction, wherein the first interconnect layer comprises a first dielectric layer and a first metal structure in the first dielectric layer, wherein the first metal structure comprises a first electrode electrically coupled to the first terminal of the transistor and a second electrode electrically coupled to the third terminal of the transistor, wherein the first electrode and the second electrode are separated from each other along a second direction perpendicular to the first direction;
• a second interconnect layer stacked on a second side of the semiconductor layer opposite to the first side along the first direction, wherein the second interconnect layer comprises a second dielectric layer and a second metal structure in the second dielectric layer;
• a first conductive structure that extends from the first interconnect layer, through the semiconductor layer, into the second interconnect layer along the first direction, wherein the first conductive structure is connected to the first metal structure and the second metal structure along the first direction;
• and
• a second conductive structure comprises a conductive filling that is connected to the second electrode of the first metal structure.