Package structure

A package structure, comprising:

• a semiconductor die;
• a back-side redistribution circuit structure, disposed over a non-active side of the semiconductor die and comprising at least one metallization layer having a main portion and conductive patterns separated from the main portion through slits, wherein the conductive patterns each comprise:
• a first portion;
• at least one second portion;
• and
• at least one connecting portion, connecting the first portion and the at least one second portion;
• a front-side redistribution circuit structure, disposed over an active side of the semiconductor die and electrically coupled to the semiconductor die;
• and
• a plurality of vertical connectors, disposed between and electrically coupling the back-side redistribution circuit structure and the front-side redistribution circuit structure, and disposed next to and electrically coupled to the semiconductor die,
• wherein in a top view, each of the conductive patterns disposed on at least one diagonal line of the package structure has a line passing through a center of the first portion, a center of the at least one second portion and a center of the at least one connecting portion, the line is substantially perpendicular to the at least one diagonal line, and
• wherein in the top view, the package structure has a rectangular profile, and the at least one diagonal line is a vertex-to-vertex line joining two vertices of the rectangular profile and passing through a center of the rectangular profile.

A package structure, comprising:

• a semiconductor die;
• a plurality of vertical connection structures, laterally disposed to the semiconductor die;
• a first redistribution circuit structure, disposed over and electrically coupled to the semiconductor die and the plurality of vertical connection structures, wherein the first redistribution circuit structure comprises conductive patterns and a main portion separated from the conductive patterns by slits, wherein a width of each of the slits is constant and ranges from 40 μm to 50 μm, and the conductive patterns each comprise:
• a first portion;
• one or more second portions;
• and
• one or more connecting portions, wherein each connecting portion extends from an edge of the first portion toward an edge of a respective one second portion, and a width of each connecting portion is gradually decreased from the first portion toward the respective one second portion;
• a second redistribution circuit structure, disposed over and electrically coupled to the semiconductor die and the plurality of vertical connection structures, wherein the semiconductor die and the plurality of vertical connection structures are between the first redistribution circuit structure and the second redistribution circuit structure;
• and
• a sub-package, disposed on and electrically coupled to the first redistribution circuit structure and comprising at least one die encapsulated in an encapsulant, wherein the first redistribution circuit structure is disposed between the sub-package and the semiconductor die.