Cmos-compatible resistive random-access memory (rram) devices

Abstract

An apparatus including a CMOS-compatible resistive random-access memory (RRAM) device is provided. An RRAM device may include a bottom electrode, a switching oxide device comprising at least one transition metal oxide, a via structure fabricated on the switching oxide device, and a top electrode fabricated within the via structure and over a top surface of the via structure. The via structure comprises a via fabricated in a hard mask layer. The RRAM device may further include a first spacer encapsulating the top electrode and the hard mask layer. In some embodiments, the RRAM device may further include a second spacer encapsulating the first spacer, the bottom electrode, and the switching oxide device.

Dependencies are inferred from the claim text.