Isolation structure having layout to increase image sensor performance
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsTing-Jung Chen, Yi-Jie Tsai, Ming-Yu Kuo, Tsung-Yu Lee, Chih Cheng Shih
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsTing-Jung Chen, Yi-Jie Tsai, Ming-Yu Kuo, Tsung-Yu Lee, Chih Cheng Shih
Estimating the term…
Various embodiments of the present disclosure are directed towards an integrated chip (IC). The IC includes a first pixel region comprising a first photodetector in a substrate. A second pixel region comprising a second photodetector is in the substrate and adjacent to the first pixel region. An isolation structure in the substrate and comprising a first isolation structure element between the first and second pixel regions. In top view the first isolation structure element has a first pair of opposing straight sidewall segments and a first pair of opposing curved sidewall segments adjacent to the first pair of opposing straight sidewall segments. A first distance between the first pair of opposing straight sidewall segments is greater than a second distance between the first pair of opposing curved sidewall segments.
An integrated chip (IC), comprising:
An integrated chip (IC), comprising:
A method for forming an integrated chip (IC), comprising:
Dependencies are inferred from the claim text.