Integrated circuit devices and methods of forming the same

A method of fabricating an integrated circuit device, the method comprising:

• forming a plurality of channel patterns and sacrificial gate patterns that extend in a first direction and are alternately stacked on a substrate;
• selectively recessing the sacrificial gate patterns at opposing ends thereof in the first direction to expose side surfaces thereof;
• forming preliminary inner spacers on the side surfaces of the sacrificial gate patterns;
• forming source/drain regions at opposing ends of the channel patterns, wherein the preliminary inner spacers are between the side surfaces of the sacrificial gate patterns and first side surfaces of the source/drain regions, which face one another in the first direction;
• performing an etching process to remove the preliminary inner spacers;
• and
• forming a first liner on the side surfaces of the sacrificial gate patterns and on the first side surfaces of the source/drain regions with respective voids therebetween in the first direction.

A method of fabricating an integrated circuit device, the method comprising:

• forming channel patterns that extend between source/drain regions in a first direction and are alternately stacked with sacrificial gate patterns therebetween;
• and
• forming hollow inner spacers between the sacrificial gate patterns and the source/drain regions, wherein forming the hollow inner spacers comprises:
• forming a first liner that conformally extends on side surfaces of the sacrificial gate patterns and on first side surfaces of the source/drain regions with respective voids therebetween in the first direction;
• and
• forming a second liner that non-conformally extends on second side surfaces of the source/drain regions, which oppose one another in a second direction that intersects the first direction,
• wherein the respective voids are bounded by the first liner in the first direction, and are bounded by the second liner in the second direction.