Radiation-hardened high-breakdown voltage semiconductor devices and methods of making the same

A high-breakdown voltage semiconductor device comprising:

• a source region;
• a drain region, wherein the high-breakdown voltage semiconductor device is configured to withstand a high-breakdown voltage between the drain region and the source region;
• an active region associated with the high-breakdown voltage semiconductor device;
• and
• a gate electrode formed within the active region, wherein the gate electrode region is shaped such that:
• (1) a first gate-controlled series transistor is formed in series with a first parasitic transistor, resulting in a first pair of series transistors formed in parallel with a first intrinsic transistor formed between the source region and the drain region, and (2) a second gate-controlled series transistor is formed in series with a second parasitic transistor, resulting in a second pair of series transistors formed in parallel with the first intrinsic transistor formed between the source region and the drain region.

A high-breakdown voltage semiconductor device comprising:

• a source region;
• a drain region, wherein the high-breakdown voltage semiconductor device is configured to withstand a high-breakdown voltage between the drain region and the source region;
• an active region associated with the high-breakdown voltage semiconductor device;
• a first opposite doping-type region formed within the active region towards a first distal end of the active region to separate the source region from a first parasitic transistor;
• a second opposite doping-type region formed within the active region towards a second distal end, opposite from the first distal end, of the active region to separate the source region from a second parasitic transistor, wherein the source region has a first conductivity type, and wherein each of the first opposite doping-type region and the second opposite doping-type region has a second conductivity type, opposite of the first conductivity type;
• a channel region associated with the source region and the drain region;
• a first sidewall leakage improvement (SLI) region formed towards a first distal end of the channel region to increase an effective channel length of the first parasitic transistor formed in the high-breakdown voltage device relative to a channel length of a first intrinsic transistor formed in the high-breakdown voltage device;
• and
• a second sidewall leakage improvement (SLI) region formed towards a second distal end, opposite from the first distal end, of the channel region to increase an effective channel length of the second parasitic transistor formed in the high-breakdown voltage device relative to a channel length of the first intrinsic transistor formed in the high-breakdown voltage device.

A high-breakdown voltage semiconductor device comprising:

• a source region;
• a drain region, wherein the high-breakdown voltage semiconductor device is configured to withstand a high-breakdown voltage between the drain region and the source region;
• an active region associated with the high-breakdown voltage semiconductor device;
• a gate electrode formed within the active region, wherein the gate electrode region is shaped such that:
• (1) a first gate-controlled series transistor is formed in series with a first parasitic transistor, resulting in a first pair of series transistors formed in parallel with a first intrinsic transistor formed between the source region and the drain region, and (2) a second gate-controlled series transistor formed in series with a second parasitic transistor, resulting in a second pair of series transistors formed in parallel with the first intrinsic transistor formed between the source region and the drain region;
• a channel region associated with the source region and the drain region;
• a first sidewall leakage improvement (SLI) region formed towards a first distal end of the channel region to increase an effective channel length of the first parasitic transistor formed in the high-breakdown voltage device relative to a channel length of the first intrinsic transistor formed in the high-breakdown voltage device;
• and
• a second sidewall leakage improvement (SLI) region formed towards a second distal end, opposite from the first distal end, of the channel region to increase an effective channel length of the second parasitic transistor formed in the high-breakdown voltage device relative to a channel length of the first intrinsic transistor formed in the high-breakdown voltage device.