Semiconductor Device

A method for forming a semiconductor device, comprising:

• forming a first multi-gate field effect transistor (FET) disposed over a substrate, the first multi-gate FET including a first active region extending on a first horizontal plane;
• and
• forming a second multi-gate FET disposed over the first multi-gate FET, the second multi-gate FET including a second active region extending on a second horizontal plane parallel to the first horizontal plane,
• wherein the first active region and the second active region do not fully overlap when viewed from a vertical direction perpendicular to the first horizontal plane.

A method for forming a semiconductor device, comprising:

• forming a first multi-gate field effect transistor (FET) disposed over a substrate and including a first active region extending on a first horizontal plane;
• and
• forming a second multi-gate FET disposed over the first multi-gate FET and including a second active region extending on a second horizontal plane parallel to the first horizontal plane, the first active region and the second active region not fully overlapping when viewed from a vertical direction perpendicular to the first horizontal plane,
• wherein forming the first multi-gate FET includes forming a first metal contact region disposed over the first active region and a second metal contact region disposed over the first active region and forming the second multi-gate FET includes forming a third metal contact region disposed over the second active region and a fourth metal contact region disposed over the second active region, the first metal contact region and the third metal contact region not fully overlapping when viewed from a vertical direction, and the second metal contact region and the fourth metal contact region not fully overlapping when viewed from the vertical direction.

A method for forming a semiconductor device, comprising:

• forming a first multi-gate field effect transistor (FET) disposed over a substrate and including a first active region extending on a first horizontal plane, a first metal contact region disposed over the first active region, and a second metal contact region disposed over the first active region;
• and
• forming a second multi-gate FET disposed over the first multi-gate FET and including a second active region extending on a second horizontal plane parallel to the first horizontal plane, a third metal contact region disposed over the second active region, and a fourth metal contact region disposed over the second active region,
• wherein the first active region and the second active region do not fully overlap when viewed from a vertical direction perpendicular to the first horizontal plane, the first metal contact region and the third metal contact region do not fully overlap when viewed from a vertical direction, and the second metal contact region and the fourth metal contact region do not fully overlap when viewed from the vertical direction.