Semiconductor device and method of manufacturing the same

A method of manufacturing a semiconductor device, the method comprising:

• providing a first substrate structure divided into a plurality of first chip regions, the first substrate structure comprising a first wafer, a first device layer disposed on the first wafer, a wiring structure disposed on the first device layer, and a first bonding structure disposed on the wiring structure;
• providing a second substrate structure divided into a plurality of second chip regions corresponding to the plurality of first chip regions, the second substrate structure comprising a second wafer, a second device layer disposed on the second wafer, a second wiring structure disposed on the second device layer, and a second bonding structure disposed on the second wiring structure;
• partially cutting the second bonding structure, the second wiring structure and the second device layer on the second wafer, wherein a width of a cut region between the plurality of second chip regions is in a range of 10 μm to 100 μm;
• bonding the second substrate structure to the first substrate structure by bonding the second bonding structure to the first bonding structure;
• exposing a surface of the second device layer by removing the second wafer from the second substrate structure;
• and
• separating the first substrate structure into the plurality of first chip regions by laser stealth dicing.

A method of manufacturing a semiconductor device, the method comprising:

• providing a first substrate structure divided into a plurality of first chip regions, the first substrate structure comprising a first wafer, a first device layer disposed on the first wafer, a wiring structure disposed on the first device layer, and a first bonding structure disposed on the wiring structure;
• providing a second substrate structure divided into a plurality of second chip regions corresponding to the plurality of first chip regions, the second substrate structure comprising a second wafer, a second device layer disposed on the second wafer, a second wiring structure disposed on the second device layer, and a second bonding structure disposed on the second wiring structure;
• partially cutting the second bonding structure, the second wiring structure and the second device layer on the second wafer by first laser stealth dicing;
• bonding the second substrate structure to the first substrate structure by bonding the second bonding structure to the first bonding structure;
• exposing a surface of the second device layer by removing the second wafer from the second substrate structure;
• and
• separating the first substrate structure into the plurality of first chip regions by second laser stealth dicing.