Semiconductor device

A semiconductor device comprising:

• a first substrate structure and a second substrate structure above the first substrate structure,
• the first substrate structure including
• a first substrate including a plurality of cell areas and a scribe lane area between the plurality of cell areas,
• a plurality of first bonding pads on the first substrate in the plurality of cell areas,
• a plurality of first dummy pads above the first substrate in the scribe lane area, and
• a first junction insulation layer surrounding the plurality of first bonding pads and the plurality of first dummy pads,
• the second substrate structure including
• a second substrate on the first substrate,
• a plurality of second bonding pads between the first substrate and the second substrate and joined with the plurality of first bonding pads each other, and
• a second junction insulation layer surrounding the plurality of second bonding pads and joined with at least a portion of an upper surface of the first junction insulation layer, and
• a sum of the areas of the plurality of first dummy pads per a unit area in the cell area is greater than or equal to a sum of the areas of the plurality of first bonding pads per a unit area.

A semiconductor device comprising:

• a first substrate structure and a second substrate structure above the first substrate structure,
• the first substrate structure including
• a first substrate including a cell area and a scribe lane area surrounding the cell area,
• a plurality of first bonding pads above the cell area of the first substrate,
• a plurality of first dummy pads above the scribe lane area of the first substrate, and
• a first junction insulation layer surrounding the plurality of first bonding pads and the plurality of first dummy pads,
• the second substrate structure including
• a second substrate on the first substrate,
• a plurality of second bonding pads between the first substrate and the second substrate and joined with the plurality of first bonding pads each other, and
• a second junction insulation layer surrounding a plurality of second bonding pads and junction with at least a portion of an upper surface of the first junction insulation layer in the cell area,
• the first junction insulation layer including a recessed portioned concave toward the first substrate in the scribe lane area, and
• a thickness of at least some of the plurality of first dummy pads is less than a thickness of the plurality of first bonding pads.