Memory latency management for decoder-side motion refinement

A pipeline video decoder comprising:

• an engine configured to receive a bitstream and to convert the bitstream into symbol data including pixel data and control parameters;
• a coarse-motion reconstruction block configured to generate decoder-pipeline region (DPR)-based coarse motion data based on a portion of the control parameters;
• a direct memory accesses (DMA) block configured to fetch reference data associated with a current prediction unit (PU) of a DPR based on the coarse motion data;
• and
• a motion-vector predictor configured to generate decoded motion data based on the portion of the control parameters and feedback refined motion data,
• wherein the feedback refined motion data is generated by a decoder-side motion estimation (DME) block based on the decoded motion data and the reference data.

A method comprising:

• receiving, by an engine, a bitstream;
• converting, by the engine the bitstream into symbol data including pixel data and control parameters;
• generating decoder-pipeline region (DPR)-based coarse motion data based on a portion of the control parameters;
• fetching reference data associated with a current prediction unit (PU) of a DPR based on the coarse motion data;
• and
• generating decoded motion data based on the portion of the control parameters and feedback refined motion data based on the decoded motion data and the reference data.