Multi-level cell maintenance operations

A memory system, comprising:

• one or more memory devices;
• and
• processing circuitry coupled with the one or more memory devices and configured to cause the memory system to:
• perform, during a maintenance operation, a first error control operation on first data;
• store second data associated with the first error control operation, the second data comprising either one or more parameters associated with the first error control operation or a first location of the memory system to which the first data is written according to whether a condition associated with the first error control operation satisfies a threshold;
• and
• perform, during the maintenance operation, a second operation using the second data.

A memory system, comprising:

• one or more memory devices;
• and
• processing circuitry coupled with the one or more memory devices and configured to cause the memory system to:
• perform, during a maintenance operation, a first error control operation on first data;
• store one or more parameters associated with the first error control operation in accordance with a condition associated with the first error control operation failing to satisfy a threshold;
• and
• perform, during the maintenance operation, a second operation on the first data according to the one or more parameters.

A method, comprising:

• performing, during a maintenance operation, a first error control operation on first data;
• storing second data associated with the first error control operation, the second data comprising either one or more parameters associated with the first error control operation or a location of a memory system to which the first data is written according to whether a condition associated with the first error control operation satisfies a threshold;
• and
• performing, during the maintenance operation, a second operation using the second data.