Memory device and operation method thereof

An operation method of a memory device, the memory device comprising a sensing node, a bit line, a first cell string, and a second cell string connected to the bit line, the first cell string comprising first selection transistors and first memory cells and the second cell string comprising second selection transistors and second memory cells, the method comprising:

• precharging the bit line and the sensing node;
• applying at least two different test voltages to the first selection transistors and the second selection transistors;
• applying pass voltages to the first memory cells and the second memory cells;
• connecting the sensing node and the bit line to sense whether a voltage of the sensing node is changed to a first reference voltage or lower during a first time;
• and
• performing a subsequent operation for the memory device, based on the sensing.

A storage device comprising:

• a nonvolatile memory device including a plurality of memory blocks and a control circuit controlling the plurality of memory blocks;
• and
• a memory controller configured to control the nonvolatile memory device,
• wherein each of the plurality of memory blocks includes a plurality of cell strings,
• wherein each of the plurality of cell strings includes a plurality of selection transistors connected to a plurality of selection lines and a plurality of memory cells connected to a plurality of word lines, and
• wherein the control circuit is configured to:
• apply at least two different test voltages to selection lines connected to a first cell string included in a first memory block among the plurality of memory blocks;
• and
• apply pass voltages to word lines connected to the first cell string to check whether a channel path of the first cell string is formed.