High voltage switch circuitry and non-volatile memory device including the same

A high voltage switch circuitry of a non-volatile memory device, comprising:

• a pass transistor configured to transfer a driving voltage to an output terminal upon being turned;
• a depletion mode transistor configured to provide a first source voltage to a source of the pass transistor in response to receiving a ground voltage at its gate;
• a level shifter configured to apply a voltage to the gate of the first pass transistor;
• and
• a first voltage source configured to supply a negative voltage smaller than the ground voltage to the level shifter,
• wherein in response to the pass transistor receiving the first source voltage and the negative voltage to its gate, the pass transistor is configured to turn on and transfer a first positive voltage to the gate of the depletion mode transistor,
• wherein a difference between the first source voltage and the negative voltage is greater than a threshold voltage of the pass transistor,
• wherein the first voltage source is configured to supply the negative voltage to the level shifter for a predetermined time,
• wherein the first transistor is configured to turn on at any point during the predetermined time, and
• wherein after the predetermined time, the first voltage source is further configured to supply the ground voltage to the level shifter.

A non-volatile memory device, comprising:

• a memory cell array comprising memory cells connected to a word line;
• a voltage generator configured to generate a first high voltage;
• a first pass transistor connected to the word line;
• and
• a high voltage switch circuitry configured to boost the first high voltage to a second high voltage and provide the second high voltage to a gate of the first pass transistor, wherein
• the high voltage switch circuitry comprises:
• a second pass transistor configured to transfer a driving voltage to an output terminal connected to the first pass transistor, upon being turned on based on its gate receiving a negative voltage;
• a depletion mode transistor configured to provide the second pass transistor with the driving voltage based on an output signal fed back from the output terminal;
• a level shifter configured to apply a voltage to the gate of the second pass transistor;
• and
• a first voltage source configured to supply the negative voltage smaller than a ground voltage to the level shifter,
• wherein the level shifter is further configured to apply the negative voltage supplied from the first voltage source to the gate of the second pass transistor.