Memory calculating timing difference between command and data, and operation method of memory system
AssigneeSK hynix Inc.
InventorJong Hyuck CHOI
Life of this patent
Estimating the term…
Abstract
A memory may include a command component configured to activate an internal clock after N clock cycles from a reception time point of a measurement command, where N is an integer equal to or greater than 0; and a data component configured to generate a first counting code by counting a data clock, generate a second counting code by counting the internal clock transmitted from the command component, and calculate a command-data timing difference based on a difference between code values of the first counting code and the second counting code.
Claims21
A memory comprising:
- a command component configured to activate an internal clock after N clock cycles from a reception time point of a measurement command, where N is an integer equal to or greater than 0;
- and
- a data component configured to generate a first counting code by counting a data clock, generate a second counting code by counting the internal clock transmitted from the command component, and calculate a command-data timing difference based on a difference between code values of the first counting code and the second counting code.
A memory comprising:
- a command component configured to generate a start signal that is activated after N clock cycles from a reception time point of a measurement command and receives a clock, where N is an integer equal to or greater than 0;
- and
- a data component configured to generate a counting code by counting the clock transmitted from the command component from an activation time point of the start signal transmitted from the command component to a toggling time point of a data clock, and calculate a command-data timing difference based on the counting code.
A memory comprising:
- a command component configured to activate an internal clock after N clock cycles from a reception time point of a measurement command, where N is an integer equal to or greater than 0;
- and
- a data component configured to generate a counting code by counting the internal clock transmitted from the command component up to a toggling time point of a data clock, and calculate a command-data timing difference based on the counting code.
A memory comprising:
- a command component configured to generate a start signal that is activated after N clock cycles from a reception time point of a measurement command and receive a clock, where N is an integer equal to or greater than 0;
- and
- a data component configured to generate a first counting code by counting a data clock, generate a second counting code by counting the clock transmitted from the command component from an activation time point of the start signal transmitted from the command component, and calculate a command-data timing difference based on a difference between code values of the first counting code and the second counting code.
An operation method of a memory system including a memory controller and a memory, the operation method comprising:
- transmitting, by the memory controller, a measurement command to the memory;
- receiving, by the memory, the measurement command;
- activating, by the memory, an internal signal after N clock cycles from the reception of the measurement command, where N is an integer equal to or greater than 0;
- starting, by the memory, measuring a time in response to the activating of the internal signal;
- toggling, by the memory controller, a data clock transmitted to the memory from a time point after M clock cycles from the transmission of the measurement command, where M is an integer greater than N;
- ending, by the memory, the measuring of the time in response to the toggling of the data clock;
- and
- calculating, by the memory, a command-data timing difference based on the measured time.
Dependencies are inferred from the claim text.