System and Method for Central Processing Unit (CPU)-based Machine Learning Training Using Affinitized Threads
AssigneeMicrosoft Technology Licensing, LLC
InventorsErvin Peretz, Robert Sommer Chappell
Life of this patent
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Abstract
A method, computer program product, and computing system for assigning a data shard associated with a machine learning application to each CPU core of a plurality of CPU cores. The data shard of a respective CPU core is loaded to a corresponding affinitized cache memory. A processing thread for the data shard is assigned to the respective CPU core. Multiple processing threads for the data shard are executed using the same respective CPU core and the corresponding cache memory.
Claims20
A computer-implemented method, executed on a computing device, comprising:
- assigning a data shard associated with a machine learning application to each CPU core of a plurality of CPU cores;
- loading the data shard of a respective CPU core to a corresponding affinitized cache memory;
- assigning a processing thread for the data shard to the respective CPU core;
- and
- executing the processing thread for the data shard using the respective CPU core and the corresponding cache memory.
A computing system comprising:
- a memory;
- and
- a processor configured to determine a number of available CPU cores of a plurality of CPU cores for executing a machine learning application, to determine a size of affinitized cache memory available per CPU core, to assigns a data shard associated with the machine learning application to each CPU core of a plurality of CPU cores, to load the data shard of a respective CPU core to a corresponding affinitized cache memory, to assign a processing thread for the data shard to the respective CPU core, and to execute the processing thread for the data shard using the respective CPU core and the corresponding cache memory.
A computer program product residing on a non-transitory computer readable medium having a plurality of instructions stored thereon which, when executed by a processor, cause the processor to perform operations comprising:
- determining a size of affinitized Level 2 (L2) cache memory available per CPU core;
- assigning a data shard associated with the machine learning training application to each CPU core of a plurality of CPU cores;
- loading the data shard of a respective CPU core to a corresponding affinitized L2 cache memory;
- assigning a processing thread for the data shard to the respective CPU core;
- and
- executing the processing thread for the data shard using the respective CPU core and the corresponding L2 cache memory.
Dependencies are inferred from the claim text.